low noise amplifier
Low Noise Amplifier (LNA) design is the process of creating an RF circuit that amplifies extremely weak signals while adding as little internal noise as possible. As the first active component in a receiver chain, the LNA’s performance primarily determines the overall system’s sensitivity.
1. Key Performance Metrics
Noise Figure (NF): The most critical metric, representing how much the amplifier degrades the Signal-to-Noise Ratio (SNR). A lower NF (e.g., <1 dB for high-end systems) is always preferred.
Gain (S21): The amplification factor, typically ranging from 10 dB to 25 dB. It must be high enough to overcome noise from later stages (like mixers) but low enough to avoid saturating them.
Linearity (IIP3 & P1dB): Measures the LNA’s ability to handle large signals without distortion.
Stability (K-factor): Ensures the amplifier does not oscillate under different load and source conditions.
Impedance Matching (S11 & S22): Usually targeted at 50 ohms to maximize power transfer and minimize reflections.
Design of CMOS based LNA for 5G Wireless Applications
Introduction to LNA: Understanding the Fundamentals – Rahsoft
2. Common Topologies
Inductively Degenerated Common Source: The industry standard for narrowband designs; it uses a source inductor to achieve simultaneous noise and power matching.
Common Gate: Offers excellent input matching over wide bandwidths but typically has a higher noise figure.
Cascode: Uses two transistors to provide high gain and superior reverse isolation (
), which improves stability.
3. Step-by-Step Design Process
Device Selection: Choose a high-performance transistor (e.g., GaAs pHEMT or CMOS) based on the target frequency and NF.
Biasing: Select an operating point (
,
) that balances gain and noise performance.
Stability Analysis: Use S-parameters to ensure the device is unconditionally stable (
) across all frequencies.
Input Matching for Noise: Instead of a standard power match, engineers use Noise Circles on a Smith Chart to find the optimal source impedance (
) for the lowest NF.
Output Matching for Gain: Match the output to 50 ohms to achieve maximum power transfer for the amplified signal.
Simulation & Layout: Use tools like Ansys HFSS or ADS to model parasitic effects and create the physical PCB or IC layout.